Hard wired in no-ops
First some clock cycles in reset, then a few of the 4 cycle no-op fetch machine cycles! 😍
The bottom LEDs are M1, Read, Write, IOreq, MEMreq, so you can see fetch on the first cycle, then just MEMreq for refresh on the 3rd
But they seem to melt down after a few seconds of no clock cycles...
You happy now, @SamanthaSnyder? 🙃

the fact that it worked first shot after adding 50 wires since the last time I tested anything certainly says SOMETHING about me... not sure what...
75Hz...
Next is blanking the address bus during refresh since thats just distracting.