Thread by @tastytronic

I'm hoping to do a series of articles / threads about how the PDP-12 works, by diving into its instruction set and other low-level behaviors. Here's the first one of these threads! 🧵 #pdp12 #umdpdp12 #RetroComputing

The PDP-12 is a combination of the LINC and the PDP-8 -- both 12-bit machines. The practice was to describe memory using four octal (3-bit) values (rather than, say, 3 hexadecimal values). So, 111111111111b is "7777" (not 0xFFF) and 101010101010b is "5252" (not 0xAAA).

The PDP-12 runs in either LINC mode or PDP-8 mode at any given time, but you can arbitrarily switch between modes (and instruction sets) at any time, using ops PDP (0002) in LINC and LINC (6141) in 8-mode. Some hardware only works in LINC mode, so this is quite common.

The LINC and the PDP-8 are single-accumulator machines, and so is the PDP-12. I.e., it has one general purpose register -- the AC. Instead of multiple registers, many ops can refer to core (RAM) addresses 1-15 and use them somewhat like modern registers.

Don't be fooled though! "Registers" 1-15 are just core memory locations, and sometimes the word "register" is used to refer to any addressible location in core, not just 1-15. These are not modern registers!

LINC ops have 3 addressing modes; D, β, and α. Let's talk about D(irect) ops. The 3 D-ops are those where the top 2 bits are nonzero 01 (ADD / 2000), 10 (STC / 4000), and 11 (JMP / 6000); they use the other 10 bits for the address.

ADD's base op is 2000 (010 000 000 000). The rightmost 10 bits specify an address between 0-1023. This address is used as a pointer -- i.e., the data at the address specified is added to the AC. ADD takes 3.2 usec.

STC's base op is 4000 (100 000 000 000); the lower 10 bits specify an address where the AC's contents will be stored. The AC will also be cleared (i.e., set to 0000). So, like ADD, the 10-bit address is a pointer to a location (an address between 0 and 1023). STC takes 3.2 usec.

JMP's base op 6000 (110 000 000 000) jumps unconditionally and directly to the 10-bit address specified in the operation -- i.e., it does not use the address as a pointer. Thus, JMPs are limited to addresses 0-1023.

But wait, there's more! In normal operation, if a JMP instruction includes a 10-bit destination address, the 10-bit address of the memory location *after* the JMP instruction is automatically stored at address 0000. Why?

For returning from subroutines! JMP 6000 will jump to the address 0000 -- the "return address" stored by the previous JMP call (which points to the next intruction after the last JMP). This way, you can easily return from a JMP and continue what you were doing.

Incidentally, many operations start with the first two bits "00" but either do not require addressing or use a different addressing scheme. For example, HLT (0000) is the halt operation, and requires 1.6 usec, the minimum duration of a LINC instruction on the PDP-12.

Other non-addressing 00-ops include CLR (0011, clear AC, link, and MQ), NOP (0016, the no-op), COM (0017, complement AC), and a variety of skips, e.g., SKP (0456, unconditionally skip the next instruction). There are at least 13 unique 00-op skip instructions (future thread!).

Finally, DJR (0006) disables the JMP return address save feature just described for "the next and only the next LINC mode JMP" so that JMPs for interrupts or traps don't mess up any return address in 0000. Probably another future thread! (end)

If you enjoy this kind of thing, check out our video channel, where we show our PDP-12 in action. youtube.com/playlist?list=…

I meant to include this diagram of D-class addressing, from the PDP-12 System Reference Manual (available here: bitsavers.org/pdf/dec/pdp12/… (thanks @bitsavers !)