Very nice work from Google on deep RL- based optimization for chip layout.
Simulated annealing and its heirs are finally dethroned after 40 years.
This uses graph NN and deConvNets, among other things.
I did not imagined back in the 90s that (de)ConvNets could be used for this.
Simulated annealing and its heirs are finally dethroned after 40 years.
This uses graph NN and deConvNets, among other things.
I did not imagined back in the 90s that (de)ConvNets could be used for this.
https://twitter.com/annadgoldie/status/1402644252320886786
This is the kind of problems where gradient-free optimization must be applied, because the objectives are not differentiable with respect to the relevant variables. [Continued...]
In this application, RL is used as a particular type of gradient-free optimization to produce a *sequence* of moves.
It uses deep models learn good heuristics as to what action to take in every situation.
This is exactly the type of setting in which RL shines.
It uses deep models learn good heuristics as to what action to take in every situation.
This is exactly the type of setting in which RL shines.
UPDATE: the rumor on the street is that the comparison with existing tools from commercial EDA houses is not as favorable as the paper claims.
A story to follow......
A story to follow......
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