Really exciting to see this coming together!

Accelerators as a kernel subsystem, built off of the existing DRM framework!

https://twitter.com/phoronix/status/1597904473942523905

Now, there's also a *slight* risk of messes down the line.

ex: some SOCs might want to exposes the same ip block via multiple interfaces.

Example: A GPU can be thought of as both a traditional "display accelerator" in DRM as before

but it can also be an AI/matrix engine

1/3
A little late on this thread, but I can provide some context/info here:

Overall, mastodon moderation tends to be more active overall, and not being active is seen as a detriment to the instance itself as well as the “fediverse” as a whole.

https://twitter.com/HPC_Guru/status/1594033836740214784

2/3
Mastodon. Social is considered to be less moderated than ideal. Partially because of its scale, partially because it’s where most users land whenever there’s a huge influx of users etc. It’s more moderated than Twitter, but less than others would like.

Cool little chip I came across while going through ark:
ark.intel.com/content/www/us…

1.7 GHz, dual core icelake chip that peaks at 25W, has AVX512 etc. This with dual FMA units would be a fascinating little SKU, especially with QA and the other recent AI accelerators for edge applications

Something a little different today:
A blog post on the curious case of Alder Lake, the quest for reduced precision on x86, preparing HPC FOSS libraries and documentations, and how a certain vendor made it explicitly harder to support their own hardware.

gist.github.com/FCLC/56e4b3f4a… This is an abridged recounting of months of works which is still ongoing to this day.

Writing this up stemmed from a tangent with @owainkenway about needing special microcode revisions within custom kernels, and instead of just an email, turned it into a post of sorts.