In IEDM 2024, Intel researchers will presented a unique gate oxide atomic layer deposition process a low-temperature gate cleaning process to build GAA devices that demonstrated breakthrough performance for MoS2- and WSe2-based GAA NMOS and PMOS transistors.
From the proposed method it was achieved record subthreshold slope (<75mv/dec) and drain current (Idmax>900 µA/µm at <50nm gate length) in sub-1nm-thick monolayer MoS2 GAA NMOS transistors.
Apr 11, 2022 • 12 tweets • 4 min read
Contrary to what is stated in this article, the cited patent does not refer to AMD CPUs, but to the accelerator present in RDNA3.
wccftech.com/amd-cpu-patent…
In patent writing it is good practice to avoid unnecessarily extending the explanation of likely application of the invention and to focus on explaining the innovation that is desired to be patented. In the case of the cited patent, this fact occurs.
Apr 6, 2022 • 15 tweets • 6 min read
About Intel Ocean Cove: Since the beginning of 2018, I had been following the work of the Hillsboro team, looking forward to have access to the first patent of the disruptive new architecture that was being developed... And in 2019, this patent was finally published.
Upon analyzing it, I was absolutely shocked by what I saw and was certain that this patent would never be granted in the state in which it was presented. However, yesterday I received notification that this patent had been granted.
Sep 4, 2021 • 4 tweets • 3 min read
Things I was doing while I was recovering from ear infection: Studying the proposed 3D SRAM structure which Intel will use in its future processors together with its 20A node...
This is the 3D nanoribbon-based 6T SRAM cell proposal
Sep 2, 2021 • 6 tweets • 3 min read
In this paper, researchers have presented AfterImage, a new side-channel that exploits the Intel Instruction Pointer-based stride prefetcher.
arxiv.org/pdf/2109.00474…
By reverse-engineering the ip-stride prefetcher in modern intel processors, the researchers have successfully developed three variants of AfterImage to leak control flow information across code regions, processes and the user-kernel boundary.
Aug 6, 2021 • 21 tweets • 22 min read
Here's the AMD patent list that I had promised you, bringing several new developments including GPU, CPU, memory and more.
Pt. 3
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Patent: Dedicated Vector Sub-processor System - AMD
A new architectural proposal for CDNA2 and beyond, improving processing efficiency to HPC and Deep Learning applications...
In this paper, Intel researchers is presented C-for-Metal, an explicit SIMD programming framework designed to deliver close-to-the-metal performance on Intel GPUs.
arxiv.org/pdf/2101.11049…
The experimental results show that CM applications from different domains outperform the best-known SIMT-based OpenCL implementations, achieving up to 2.7x speedup on the latest Intel GPU.
Jul 6, 2021 • 25 tweets • 24 min read
Here's the AMD patent list that I had promised you, bringing several new developments including graphics, memory and quantum computing.
Pt. 1
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Patent: Variation-aware qubit movement scheme for noise intermediate scale quantum era computers - AMD
In this paper is presented PyTorch-Direct, a GPU-centric data access paradigm with a novel circular shift indexing optimization for GNN training to reduce training time, CPU utilization, and power consumption. #PyTorch#DeepLearning
arxiv.org/pdf/2101.07956…
PyTorch-Direct presents a new class of tensor called “unified tensor.” While a unified tensor resides in host memory, its elements can be accessed directly by the GPUs, as if they reside in GPU memory.
Jan 22, 2021 • 4 tweets • 2 min read
Researchers have proposed a new class of accelerators named Self Adaptive Reconfigurable Arrays, which comprise of both a reconfigurable array and a hardware unit capable of determining an optimized configuration for the array at runtime.
arxiv.org/pdf/2101.04799…
Also, it's proposed a neural network called ADAPTNET which recommends an array configuration and dataflow for the current layer parameters.
An integrated custom hardware ADAPTNETX runs ADAPTNET at runtime and reconfigures the array, making the entire accelerator self sufficient.
Jan 22, 2021 • 14 tweets • 14 min read
Here is the first list of AMD patents in 2021. Together with this list, I am preparing some articles (yes, there will be several articles) to give a due analysis to the set presented here until the end of this month. Stay tuned!
2/2
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Patent: GPU cache management based on locality type detection - AMD
Finally, after so many setbacks, here's a new list of AMD patents, bringing AMD's latest developments in CPU, GPU, package and more. More details will come soon in the next articles. (3/4 - 4/4)
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Patent: Activation Function Functional Block for Electronic Devices - AMD
Finally, after so many setbacks, here's a new list of AMD patents, bringing AMD's latest developments in CPU, GPU, package and more. More details will come soon in the next articles. 2/4
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Patent: System and method for scheduling instructions in a multithread simd architecture with a fixed number of registers - AMD
Finally, after so many setbacks, here's a new list of AMD patents, bringing AMD's latest developments in CPU, GPU, package and more. More details will come soon in the next articles. 1/4
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Patent: Side information for video data transmission - AMD
Methods for performing efficient video compression for wireless VR stream communication...