Carlos Eduardo (@carlosedp@fosstodon.org) Profile picture
RISC-V Ambassador. Open-source Sw/Hw, FPGAs, cloud multiarch enthusiast. Build clusters for life @redhat and for fun elsewhere. Opinions are 100% mine.
Apr 13, 2021 24 tweets 13 min read
I'll start a "live-tweet" thread for the process to add @DigilentInc ArtyA7 support to my @chisel_lang ChiselBlinky project including FuseSoc support.
This is inspired by @OlofKindgren thread yesterday.
Follow the 🧵 @DigilentInc @chisel_lang @OlofKindgren Disclaimer, I've never used Xilinx FPGAs and Vivado and will discover how to use it as I go. I currently have a Windows 10 VM with Vivado installed.
Later I'll setup a Linux VM with it as recommended by @mithro and @hasheddan and also try with @YosysHQ stack.