@fclc Profile picture
Perf & ASM nerd, practical troublemaker Care about clean specs, clean mandates, HPC, IEEE754 & the BLAS. Eng at @ainekk0, prev @tenstorrent, Weather @Canada

Oct 19, 2022, 7 tweets

Something a little different today:
A blog post on the curious case of Alder Lake, the quest for reduced precision on x86, preparing HPC FOSS libraries and documentations, and how a certain vendor made it explicitly harder to support their own hardware.

gist.github.com/FCLC/56e4b3f4a…

This is an abridged recounting of months of works which is still ongoing to this day.

Writing this up stemmed from a tangent with @owainkenway about needing special microcode revisions within custom kernels, and instead of just an email, turned it into a post of sorts.

Some of the content is a little harsh towards certain entities. I want to be clear to those at said entities that I truly do value the amazing work you do and that I still believe in you longer term.

Heck I'm still open to working with you on fixing some of these problems!

At the same time, I can't exactly let you off the hook for it. If the goal is too have "the best and most vibrant HPC software ecosystem" don't actively work against those of us trying to help you on our own time and our own dime.

If you spot any omissions or mistakes, please do let me know. Wrote this up between supper and movie night 😅

Beyond that, feel free to send comments, questions, or concerns to me publicly or in DM's, mine are open 😊

People that have been helpful along the way have been @IanCutress for his initial coverage, @InstLatX64 for the in depth checks of implementations, several members of the #HPC, #AVX512 and #silicongang communities, insight from various people at [blank] and others I can't mention

@IanCutress @InstLatX64 @sramkrishna this is the one I was talking about 😊

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