Thread by @sylefeb

Wolfenstein 3D render loop in pure hardware! No CPU, no instruction pointer, no opcodes, only wires and flip-flops. Here runs on a Mojo V3 board (Xilinx Spartan 6) + SDRAM. Reading @fabynou black books while learning about #FPGA could only lead to this ;-)
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Implemented from scratch using my language, from the SDRAM double-framebuffer to the Wolf3D DDA algorithm (and this is the original one; fixed point, DDA loop with only adds and shifts, tangent table!). 320x200, 256 18-bits colors palette and VGA output -- old school!
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DDA algorithm heavily building on the original @ID_AA_Carmack AsmRefresh impl.:
github.com/id-Software/wo…

Fascinating to look back into it! Love these runtime patches ;-)

mov [BYTE cs:horizop],OP_JLE ; patch a jle in

(can't do on FPGAs ... unless reconfig at runtime ...??)
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My compiler was up to the task, found a single issue throughout the process!

Here is a debug session (simul with Icarus). Tracking a glitch (missing column). Due to small discrepancies in the tangent table. Still trying to get it perfect, subtle due to limited precision.
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