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23 Jan, 5 tweets, 3 min read
In this paper is presented PyTorch-Direct, a GPU-centric data access paradigm with a novel circular shift indexing optimization for GNN training to reduce training time, CPU utilization, and power consumption. #PyTorch #DeepLearning

arxiv.org/pdf/2101.07956…
PyTorch-Direct presents a new class of tensor called “unified tensor.” While a unified tensor resides in host memory, its elements can be accessed directly by the GPUs, as if they reside in GPU memory.
To support seamless transition of applications from the original PyTorch to PyTorch-Direct, it's presented a programming interface for using unified tensors, giving consistency with the existing PyTorch GPU tensor declaration mechanism.
"With PyTorch-Direct, the time spent for accessing irregular data structures in host memory is reduced on average by 47.1% compared to the baseline PyTorch approach."
PyTorch-Direct also can speedup end-to-end GNN training by up to 1.62x depending on GNN architecture and input graph. Furthermore, by reducing the CPU workload, PyTorch-Direct provides 12.4% to 17.5% of reduced system power consumption during GNN training.

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More from @Underfox3

22 Jan
Researchers have proposed a new class of accelerators named Self Adaptive Reconfigurable Arrays, which comprise of both a reconfigurable array and a hardware unit capable of determining an optimized configuration for the array at runtime.

arxiv.org/pdf/2101.04799…
Also, it's proposed a neural network called ADAPTNET which recommends an array configuration and dataflow for the current layer parameters.

An integrated custom hardware ADAPTNETX runs ADAPTNET at runtime and reconfigures the array, making the entire accelerator self sufficient.
The SARA accelerator implementation (SAGAR) is capable of providing the same mapping flexibility as a collection of 1024 4×4 arrays working as a distributed system while achieving 3.5x more power efficiency and 3.2x higher compute density than the baseline.
Read 4 tweets
22 Jan
Here is the first list of AMD patents in 2021. Together with this list, I am preparing some articles (yes, there will be several articles) to give a due analysis to the set presented here until the end of this month. Stay tuned!

2/2

Follow the thread! 🦊
Patent: GPU cache management based on locality type detection - AMD

Cache management for MCM GPUs

More details: freepatentsonline.com/20200401529.pdf
Patent: Dynamic Voltage Frequency Scaling Based on Active Memory Barriers - AMD

DVFS hardware that counts numbers of active memory barriers in each of the GPU islands...

One of the essential foundations of EHP.

More details: freepatentsonline.com/20200379543.pdf
Read 14 tweets
22 Nov 20
Here is Xilinx's long-awaited list of patents, highlighting the latest developments that may be interesting for future AMD projects. (1/3)

Follow the thread! 🦊
Patent: Dynamically structured single instruction, multiple data (SIMD) instructions - Xilinx

This patent could be very interesting applied to future generations of CDNA...

More details: freepatentsonline.com/10824434.pdf
Patent: Method of selecting routing resources in a multi-chip integrated circuit device - Xilinx

More details: freepatentsonline.com/20190258767.pdf
Read 25 tweets
20 Nov 20
In this thread, you can more easily find the three parts of the AMD patent list that I published most recently.

Good reading! Image
Read 4 tweets
20 Nov 20
Finally, after so many setbacks, here's a new list of AMD patents, bringing AMD's latest developments in CPU, GPU, package and more. More details will come soon in the next articles. (3/4 - 4/4)

Follow the thread! Image
Patent: Activation Function Functional Block for Electronic Devices - AMD

More details: freepatentsonline.com/20190180182.pdf ImageImageImageImage
Patent: Speculative instruction wakeup to tolerate draining delay of memory ordering violation check buffers - AMD

Does anyone remember the "zero bubbles" concept? 🦊

More details: freepatentsonline.com/20200319889.pdf ImageImageImageImage
Read 22 tweets
18 Nov 20
Finally, after so many setbacks, here's a new list of AMD patents, bringing AMD's latest developments in CPU, GPU, package and more. More details will come soon in the next articles. 2/4

Follow the thread! Image
Patent: System and method for scheduling instructions in a multithread simd architecture with a fixed number of registers - AMD

RDNA3...

More details: freepatentsonline.com/20200278947.pdf ImageImageImage
Patent: Region-based image compression and decompression - AMD

This application is a continuation of previous patent application. I'm posting for research and additional reference.

More details: freepatentsonline.com/20200280721.pdf ImageImageImage
Read 19 tweets

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