Large convolutional neural networks are computing-intense, with two distinct modes of operation:
✅ "training" an NN: over 100,000 GPU hours
✅ "inference": running an NN in the car
Tesla has built supercomputer-performance chips for both workloads.
blogs.nvidia.com/blog/2016/08/2…
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✅ "training" an NN: over 100,000 GPU hours
✅ "inference": running an NN in the car
Tesla has built supercomputer-performance chips for both workloads.
blogs.nvidia.com/blog/2016/08/2…
1/
https://twitter.com/antonkanerva/status/1377919523593015296
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Tesla has yet to disclose details about their "Dojo" training chip, here's the CPU die layout of their inference chip.
The large integrated SRAM cells & the single-clock 96x96 matrix multiplicators allow Tesla HW3 boards to run large NNs at unmatched power efficiency.
Tesla has yet to disclose details about their "Dojo" training chip, here's the CPU die layout of their inference chip.
The large integrated SRAM cells & the single-clock 96x96 matrix multiplicators allow Tesla HW3 boards to run large NNs at unmatched power efficiency.
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Power efficiency is the primary limit of consumer grade, mass-adopted autonomy (self-driving in every car): while current top of the line GPUs are able to perform inference computing at a performance comparable to Tesla's FSD chip, they do it while drawing ~10x more power.
Power efficiency is the primary limit of consumer grade, mass-adopted autonomy (self-driving in every car): while current top of the line GPUs are able to perform inference computing at a performance comparable to Tesla's FSD chip, they do it while drawing ~10x more power.
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The power draw of large neural networks using generic GPU processors reduces the effective range of EVs to an unacceptable level.
Tesla has defined a hard limit of ~100W of power draw for their FSD board, and their chip uses this power envelope at unparalleled efficiency.
The power draw of large neural networks using generic GPU processors reduces the effective range of EVs to an unacceptable level.
Tesla has defined a hard limit of ~100W of power draw for their FSD board, and their chip uses this power envelope at unparalleled efficiency.
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