Discover and read the best of Twitter Threads about #RISCV
Most recents (10)
We've spent the last 18 months on a particularly vexing question - is there an opportunity to build semiconductor design giants again? @Sid_1_0 @TrivediVedant and i penned our thoughts on behalf of @SequoiaIndiaSEA here :
bit.ly/risc-v-sequoia
bit.ly/risc-v-sequoia
In this thread, I will try to teach you about a RISC-V processor, piece by piece! You can take a look at the image that depicts the instructions and registers of an RV32I (simpelst) and ask questions before we gradually delve into the design. #riscv #twitterSchool 1 
Oh, I forgot about the registers! Registers are memory in the CPU. They range from x0 to x31. A register has 32 bits in RV32I. The content of x0 is always zero, but we'll get to that later. The registers also have other names (on the right). But let's ignore that for now. 2
In RISC-V, there are many extensions and designations, including 64-bit and 128-bit. But we will ignore that and not go into it. However, there is a little sweet brother RV32E, which has only 16 registers instead of 32. Look here, but ignore it for now.
five-embeddev.com/riscv-isa-manu…
3
five-embeddev.com/riscv-isa-manu…
3
💥Day 1: Doom iCEBreaker Edition
An iCE40UP #FPGA is tiny, with just 5000 logic cells, but that didn't stop Sylvain Munaut from running Doom. The design uses a @1bitsquared iCEBreaker board with added SPI ram.
Watch:
Source: github.com/smunaut/doom_r…
An iCE40UP #FPGA is tiny, with just 5000 logic cells, but that didn't stop Sylvain Munaut from running Doom. The design uses a @1bitsquared iCEBreaker board with added SPI ram.
Watch:
Source: github.com/smunaut/doom_r…
@1bitsquared ⛵️Day 2: VexRiscv FPU
I've long wanted an FPGA-friendly #RISCV core with FPU. @SpinalHDL granted my wish this year by adding IEEE 754 support to VexRiscv. It now supports float and double with single-cycle FADD, FSUB, FMUL, and FMADD.
Source: github.com/SpinalHDL/VexR…
I've long wanted an FPGA-friendly #RISCV core with FPU. @SpinalHDL granted my wish this year by adding IEEE 754 support to VexRiscv. It now supports float and double with single-cycle FADD, FSUB, FMUL, and FMADD.
Source: github.com/SpinalHDL/VexR…
1/ Been struggling to find an elegant analogy to explain all this China tech crackdown + regulatory changes.
I think I've found it.
China is removing 40+ years worth of "startup debt"
Lemme explain 🧵👇
I think I've found it.
China is removing 40+ years worth of "startup debt"
Lemme explain 🧵👇
2/ Opening & Reform in 1978 marked birth of China the startup
Deng was founding CEO, looking for product-market fit, experimenting w/ FDIs, Shenzhen (a fishing village back then) etc
40+ years later, it mostly worked, but China accumulated a lot of "startup debt"
Deng was founding CEO, looking for product-market fit, experimenting w/ FDIs, Shenzhen (a fishing village back then) etc
40+ years later, it mostly worked, but China accumulated a lot of "startup debt"
3/ Every successful tech co needs to clean up its "startup debt" when reaching maturity; most don't survive that long
Takes usually 8-10 years
$FB's transition from Move Fast & Break Things -> Move Fast with Stable Infra happened 10 years after founding
Takes usually 8-10 years
$FB's transition from Move Fast & Break Things -> Move Fast with Stable Infra happened 10 years after founding
China has warned investing in Metaverse stating its still infancy and could likely end in tears for investors
Meanwhile ByteDance has bought VR gear maker Pico for $1.4 billion
#China #Bytedanc #Metaverse #Pico #VR #VRChat
Meanwhile ByteDance has bought VR gear maker Pico for $1.4 billion
#China #Bytedanc #Metaverse #Pico #VR #VRChat
#Pico was valued by PE investors in March 2021 at nearly $155 Million and now #Bytedance has purchased Pico at $1.4 Billion… a very aggressive valuation for a VR gear manufacturer
VR is the interface of Metaverse, but at present, the most widely used scene of consumer VR is games.
#VR #Metaverse #AR #GamingNFT
#VR #Metaverse #AR #GamingNFT
Come join me (the "monster" 😂) as we dive deep into the #WiFi Code inside #RISCV #BL602 (the "wifi chip" 😂)
lupyuen.github.io/articles/pinec…
lupyuen.github.io/articles/pinec…
Here's the #BL602 #WiFi Firmware ... Let's find out how it connects to a WiFi Access Point
github.com/lupyuen/bl_iot…
github.com/lupyuen/bl_iot…
How much DooM can fit in a USB port? Quite a bit it turns out! A minuscule #Fomu #fpga board hosts my hardware/software re-implementation of the DooM render loop in the confines of a USB port (uses ~4200 LUTs and < 128 kB of internal RAM). (1/n)
This is a tiny piece of DooM in a 2.1x2.7 mm #fpga. That is pretty small! (can you see it below on the #Fomu board? you might have to zoom ...).
I created within a #riscv computer with specialized texturing and column drawing hardware. Designed to render DooM 1994 levels! (2/n)
I created within a #riscv computer with specialized texturing and column drawing hardware. Designed to render DooM 1994 levels! (2/n)
The OLED screen is connected to the #Fomu through jumper wires soldered on the pads (a trick inspired by @brunolevy01 Fomu vga mod). (3/n)
Now we port the #LoRaWAN Driver ... From Apache #Mynewt OS to #RISCV #BL602
github.com/lupyuen/bl_iot…
github.com/lupyuen/bl_iot…
Our #BL602 #LoRaWAN Driver has many Layers (like Shrek) ... Let's peel the Shrek ... (erm) Layers 🧅
github.com/lupyuen/bl_iot…
github.com/lupyuen/bl_iot…
The Application Layer (left) of our #BL602 #LoRaWAN Driver exposes LoRaWAN Functions to Application Firmware ... Join Network, Open/Close Port, Transmit/Receive Packets
github.com/lupyuen/bl_iot…
github.com/lupyuen/bl_iot…
"Global by Nature (Part I): Developers"
First of a 4-part series that's been in my head for probably 4 years, on what Globalization 2.0 looks like and what kind of people, products, paradigms & opportunities will be “global by nature.”
Thread 👇👇
interconnected.blog/global-by-natu…
First of a 4-part series that's been in my head for probably 4 years, on what Globalization 2.0 looks like and what kind of people, products, paradigms & opportunities will be “global by nature.”
Thread 👇👇
interconnected.blog/global-by-natu…
1/ Globalization 1.0 was all about trade. Globalization 2.0 is all about technology.
In G2.0 the most important people to understand is: developers--the builders and kingmakers of technology.
Developers is the single most important demographic that will shape G2.0
In G2.0 the most important people to understand is: developers--the builders and kingmakers of technology.
Developers is the single most important demographic that will shape G2.0
2/ My plain language working definition of "developers" is simply: *someone who uses digital technology to build things*
They have a global mindset due to two motivations: utilitarian and communal.
They have a global mindset due to two motivations: utilitarian and communal.
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"Celebrating One Billion 7nm Chips: Why Scale Matters", TSMC Blog, Aug 20, 2020 tsmc.com/english/newsEv…
entered volume production in April 2018
100+ products
Automotive Quality System to the 7nm in 2019
Dry-Clean Technique for EUV Mask, Jul 2020
"Celebrating One Billion 7nm Chips: Why Scale Matters", TSMC Blog, Aug 20, 2020 tsmc.com/english/newsEv…
entered volume production in April 2018
100+ products
Automotive Quality System to the 7nm in 2019
Dry-Clean Technique for EUV Mask, Jul 2020
=>
"ASML unveils EUV Technology Training Center in Taiwan", Aug 20, 2020 asml.com/en/news/press-…
Tainan Science Park
ASML expects to develop 360 EUV engineers/year
18 months
An EUV training center in South Korea
TSMC continues to expand capacity, Aug 20 focustaiwan.tw/business/20200…
"ASML unveils EUV Technology Training Center in Taiwan", Aug 20, 2020 asml.com/en/news/press-…
Tainan Science Park
ASML expects to develop 360 EUV engineers/year
18 months
An EUV training center in South Korea
TSMC continues to expand capacity, Aug 20 focustaiwan.tw/business/20200…
=>
"CHIPS Act Targets Post-Globalized Industry", Aug 12, 2020 eetimes.com/chips-act-targ…
Dan Hutcheson, CEO of VLSI Research
James Lewis, CSIS
American Foundries Act, S.Amdt to NDAA FY2021
CHIPS for America Act
"CHIPS Act Targets Post-Globalized Industry", Aug 12, 2020 eetimes.com/chips-act-targ…
Dan Hutcheson, CEO of VLSI Research
James Lewis, CSIS
American Foundries Act, S.Amdt to NDAA FY2021
CHIPS for America Act
