Thread by @RizelBobb

ok time for me to twitter-study. aka i need to study, but i addicted to twitter, so im just going to tweet my notes.

Computer Architecture midterm studying..starting now.

so first off, in class we are using ..32 bit architecture..this means that it handles 32 bit addresses. We got 32 registers and each register is 32 bits wide. each register may hold an instruction or a pointer/storage address

if it was a 64 bit architecture..then it would be 64 bits wide to hold 64 bit wide addresses..the fact that we actually have 32 registers is actually just a coincidence. All 32 of the registers are referenced from $0 - $31. $0 will ALWAYS hold 0 in it

$0 cannot be a destination register because it cant be written to bc it holds 0 in it.

Symbolic representation of registers $S0, $S1, $S2 ... $S7 —— $t0, $t1,
$t2 ... $t7 —— $a0, $v0, $zero. S - saved. T - temporary. a0 - argument.
v0 - return value. These symbolic representations are key to make function calls. functions record using a stack,

save then return the value.

Memory is slow, registers are really fast.

2^32 address in memory.
Byte = 8 binary bits -- smallest data type that is typically used
bit = binary 0 or 1
Each byte would have it's own address..and it is uses ASCII characters
ASCII: 8 bits → 1 character

Makes sense that each character has its own address. Smallest
data type is the size of a type. Memory is byte addressable, and every
character or byte has its own address..and this allows you to do string manipulation easily

Arithmetic and logical instructions : add, sub(tract), and, or

Ascii's limitations is that it can only handle characters from the Greek and Roman alphabet.

Add $7, $5, $6 --this is an instruction but what does it mean

Add $7, $5, $6 ..register $5 and $6 are source registers while $7 is a destination register.

the contents of register 5 gets added to the contents of register 6 ..and the result will be stored in register 7

you cannot access memory UNLESS it's a load or store instruction.

for the add instruction, you want them all in operands..not in memory because registers are WAYYYYYYYYYYYY faster than memory

bitwise and / or instruction- does the and /or operation on all 32 registers . does the and operation on $1, $2, $3 ...

memory oriented instruction : we only have 32 registers, so some things are going to be out in memory..when you need to go and use them u do a load operation
load- Memory -> register
ex of load word : lw $7, 4($8)

store- putting it back out into memory

lw $7, 4($8) - Reads value in register 8, which is..anything..let's say.. 90000 then it looks at the constant/offset, then gets 90004, and says that’s my address, then it goes into the memory gets the data from 90004, and says I need to get a word and put it into $7

Example steps
Begin data - 0
Int var 1 - x90000
Int var 2 - x90004
Int var 3 - x90008

Program counter is increasing it by 4

What a bitwise AND would do
$12 = 11011001
$2 = 01110010
---------------
01010000

basically 0 and 1 = 0
0 and 0 = 0
1 and 1 = 1
1 and 0 = 0

0 is false
1 is true

What a bitwise OR would do
$12 = 1 1 0 1 1 0 0 1
$2 = 0 1 1 1 0 0 1 0
---------------
11 1 1 1 01 1

0 or 1 = 1
1 or 1 = 1
0 or 0 = 0

My laptop died. I haven’t made much progress with this review LOL

sw $9, 12($8)
Processor goes to read the value in register 8, then it adds the constant, which is 12, the constant is expressed in a decimal number 12 aka C, so you will get 9000c, and that will be the memory address you want to store on, and you want to WRITE to $9

a word uses 4 addresses b/c it's 4 bytes ?? confused at this, but okay..

there's no destination register in a store word..the destination IS memory.

offset - the distance/ number of bytes away from the base value.

For load word and store word..they are ..virtually identical, but data flows in opposite direction.

Branching..there is branch on equal(beq) and branch on not equal (bne) . This is how we look at the flow of control

example of an instruction
beq $7, $8, if _ 22

Add
Sub
And
Or
If _22: lw
Sw
Add
subtract

this is saying
if(the contents of register $7 and $8 are equal){
then go down to the if_22 instruction ..start at the lw..and go down until if_22 ends,
} else {
it will start at the beginning at add and just go all the way down through all the instructions.
}

because branch on less than would cause optimization issues & its not part of mips..an alternative to a blt(branch on less then ) is to do a slt (set on less than) first, then a bne..so it would do a comparison between 2 registers..

and put a true or a false in the destination register. .then it would go to the branch on not equal.

making it into two instructions allows the processor to be fast, but blt has poor performance bc doing a less than or greater than comparison requires you to do logical arithmetic later on in the process.

every instruction is 32 bits wide, but there are two formats for instructions that i've been learning in class ..R-format (register) has a 3 register format and I-format.

r format : _______________________________
|opcode | reg | reg | reg | X | function
|_6_____|_5___|_5___|__5__ |_5 |_____6____ = 32 bits

opcode: in r format is always going to be 0
3 registers. 2 src, 1 destination, but the order is diff from assembly language
the X is archaic so we dont use that in class
function - differentiates between the instructions if it's an add or subtract etc

i format : _______________________________
|opcode | reg | reg| offset /constant
|_6_____|_5___|__5_|__16______ = 32 bits

i stands for immediate bc offset values are immediate
opcode- as opposed to the r-format..this is going to tell u if its bne/lw/sw/ beq (1-63 or 1 - x3F) 63 i format instructions
reg - 2
offset -*covered previously*

before i convert instructions to hex or binary vice versa..let's talk about how the number systems work

In regular decimal math, you have places..the ones' place, the tens' place..so like 4,378..if we break down this number..it would look like
8 *10^0 or 8*1 = 8
7 * 10^1 or 7*10 = 70
3 * 10^2 or 3*100 = 300
4* 10^3 or 4*1000 - 4000

it's similar in binary..if we had the number 0b 1011, you ignore the 0b..that indicates that it's binary, but from right to left you multiply the 1s and 0s by powers of 2. 1011 = 11 or B in hex because
1* 2^0 or 1*1 = 1
1 * 2^1 or 1*2 =2
0 * 2^2 or 0*4 =0
1 * 2^3 or 1*8 =8

this is a chart of binary -> hex -> decimal

okay back to studying again. this thread is going to continue until wednesday or thursday

converting the instruction to binary
add $7, $6, $5
$6 - 00110 (extra 0 bc 5 bits)
1 *0 = 0
+ 2* 1 = 2
4 * 1 = 4
8 * 0 = 0
$5 - 01001
1*1 = 1
2*0 = 0
4*1 = 4
8*0 = 0
$7 - 00111
1*1= 1
2* 1 = 2
4 *1 = 4
8*0 =0

opcode for this is going to be 000000 because this is an R format instruction..and all R format instructions are 0.
the X field thats archaic is going to be 00000
function code(dont have to memorize) x20
x2 0
00[10 0000]

add $7, $6, $5
becomes

opcode src $6 src $5 dest $7 X function
000000 00110 00101 00111 00000 10 0000

okay so now i wanna turn this into hex. i gotta group each number by 4 starting from right (the last) to left(the first)..basically hex is the same as decimal..until you get up to 10-15..those numbers will be A -F

[0000] [00 00] [110 0] [0101] [ 0011] [1 000] [00 10] [0000]

0000 - 0
0010 - 2
1000 - 8
0011- 3
0101 - 5
1100 - C(12)
0000 - 0
0000- 0

so the answer would be 0x00C53820 --> add $7, $6, $5

0x is just hex

okay now to convert an i format instruction to hex
lw $7, 4($8)

lw is x23 - 0010 0011
2 - 0010
3- 0011

$7- 00111
$8 -01000
4- 0000000000000100

opcode(6bits) - 100011
src(5bits) - 01000
dest(5bits) - 00111
offset(16bits) - 0000000000000100
[1000] [11 01] [000 0] [0111] [0000] [0000] [0000] [0100]
8 D(13) 0 7 0 0 0 4

0x8D070004

sw $9, -4($12) to hex
sw - x2B
2 - 0010
B(11)- 1011

opcode - 101011
rs $12 - 01100
rt $9- 01001
offset- 1111111111111011100
4 - 0000000000000100
to change it negative flip 0s to 1s vice versa +4
-4 - 1111111111111011 100

101011110010011111111111111011 binary

If you have a negative offset..Change all the zeros to 1 and all 1s to zero ..add 1.. and you have to carry the one. This is called the twos complement and ones complement

In programming , if you wanted to single out one value from the hex number, you have bitmask it..which is anding all the non relevant numbers with 0 because anything and 0 is 0. But the number that is relevant and the binary with ones or and a hex num with F (1111)

Then you would do a bitshift so that it’s easier to evaluate the nums by 1,2, 4, or 8 so you shift it by the num of bits

PC offset or program counter -holds address of next instruction to be executed

Two ways to measure performance.
1.Execution time--how long does it take to run certain programs
2. Alternative is throughput - in a certain amount of time how much stuff can i get done --this is good for i/o

Performance is the inverse of execution time
performance = 1/ execution time

THEREFORE..
As the execution time gets bigger, performance gets worse
Better performance means execution time is smaller

Performance A Execution B
_____________ = _________________
Performance A Execution A

However, it's useless to state that one system's performance is a number of seconds faster than another. Instead we work with ratios..we put the faster performance on top. Ex: 5/4 --so performance A is 1.25% faster than performance B

Execution time =(number instructions that got executed) * (avg num of clock cycles per instruction) * (amount of time per clock cycle)

UGH I STOPPED STUDYING TO DO MY DATA STRUCTURES ASSIGNMENT AND GUESS WHAT? He extended the due date, so I just wasted time.

okay so if you typed in "Hello World" ..it would go from ur input/keyboard through the I/O bus to the I/O bridge to a register file. then out of the register file..into main memory. it executes a hello world.exe on the disk which is stored in main mem via the i/o bridge

then from the register file through the io bridge..it's displayed through your graphics adapter.

Memory Hierarchy:
L0: registers
L1: on chip sram
L2: off chip sram
L3: dram /main mem
L4: local disks/local secondary storage
L5: remote secondary storage

L0 is smallest, fastest, costliest..L5 is slowest, largest, cheapest

Things that cant fit into the registers will wind up in memory or cache

access to these looks like:
register - fraction of a clock cycle vs Main memory - 200 clock cycles

our programs have to be saved out to disks because everything from L1-L3 is lost once you power down your computer

part of what makes DRAM so cheap is that it doesnt have to hold it's value..theres called refresh ..you have continually read the value and write back out to it

caches are built right into the CPU. You dont have to go out to any buses or anything

locality of reference

Temporal locality of references. If it’s not in the cache the first time, it’s added, and you can quickly pull it up again.
Spatial locality of reference - if you access that memory location, you’re likely to access nearby memory locations

Ex: if you have an array and you access array[2], there’s predictability that you will access array[2] array[3] array[4] array[1]

cache miss- the system was looking for something in the cache and it wasn't there
cache hit - system went into the cache and found it.
Anytime you have a cache miss, the system must go out and get not only that memory address but also the surrounding addresses (a block)

a typical size of a block would be 32 or 64 bytes

you want to avoid going out the main memory after a cache miss as much as possible

but block sizes HAVE TO be powers of 2

Output of the disassembler I made last week 🥰 💻

So with the fully associative method , the system can place the block ANYWHERE..there are no rules. This is bad because that means you have to check all these lines for the cache. This leads to poor performance.

Performance criteria for cache:
-hit rate (% of hits)
-hit speed(how fast do U get hits)
-miss penalty (how slow are the misses)

Fully associative cache means the HIT SPEED IS HORRIBLE.
A better alternative is A DIRECT MAPPED CACHE.. where you only have one legal slot in the cache. This increases the hit speed !

The rule for direct mapped caches..basically the slot /line # has to be the same as the block number !